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(R)
VN750 / VN750S / VN750PT / VN750-B5
HIGH SIDE DRIVER
TYPE VN750 VN750S VN750PT VN750-B5
RDS(on)
IOUT
VCC
60 m
6A
36 V
SO-8
PENTAWATT
CMOS COMPATIBLE INPUT ON STATE OPEN LOAD DETECTION s OFF STATE OPEN LOAD DETECTION s SHORTED LOAD PROTECTION s UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN s PROTECTION AGAINST LOSS OF GROUND s VERY LOW STAND-BY CURRENT
s s s
P2PAK
PPAK ORDER CODES
PACKAGE
TUBE
T&R
PENTAWATT VN750
REVERSE BATTERY PROTECTION (*)
SO-8 P2PAK PPAK
VN750S VN750-B5 VN750PT
VN750S13TR VN750-B513TR VN750PT13TR
DESCRIPTION The VN750, VN750S, VN750PT, VN750-B5 are a monolithic device designed in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient BLOCK DIAGRAM
compatibility table). Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device detects open load condition both is on and off state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection.
VCC
VCC CLAMP
OVERVOLTAGE DETECTION UNDERVOLTAGE DETECTION
GND Power CLAMP
INPUT LOGIC
DRIVER OUTPUT CURRENT LIMITER
STATUS
ON STATE OPENLOAD DETECTION OVERTEMPERATURE DETECTION
OFF STATE OPENLOAD AND OUTPUT SHORTED TO VCC DETECTION
(*) See application schematic at page 8
August 2002
1/29
1
VN750 / VN750S / VN750PT / VN750-B5
ABSOLUTE MAXIMUM RATING
Symbol VCC - VCC - Ignd IOUT - IOUT IIN ISTAT Parameter DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF) VESD - INPUT - STATUS - OUTPUT - VCC Maximum Switching Energy (L=1.8mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=9A) Maximum Switching Energy (L=2.46mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=9A) Power Dissipation TC=25C Junction Operating Temperature Case Operating Temperature Storage Temperature 4000 4000 5000 5000 100 138 4.2 60 60 Internally Limited - 40 to 150 - 55 to 150 138 60 V V V V mJ mJ W C C C SO-8 Value PENTAWATT P2PAK 41 - 0.3 - 200 Internally Limited -6 +/- 10 +/- 10 PPAK Unit V V mA A A mA mA
EMAX EMAX Ptot Tj Tc Tstg
CONNECTION DIAGRAM (TOP VIEW)
VCC OUTPUT OUTPUT VCC
5 4
8
1
N.C. STATUS INPUT GND
5 4 3 2 1
OUTPUT STATUS VCC INPUT GND
SO-8
PPAK / P2PAK
PENTAWATT
CURRENT AND VOLTAGE CONVENTIONS
IS
IIN INPUT ISTAT STATUS
VCC
IOUT OUTPUT GND VCC
VIN VSTAT IGND
VOUT
2/29
VN750 / VN750S / VN750PT / VN750-B5
THERMAL DATA
Symbol Rthj-case Rthj-lead Rthj-amb Parameter Thermal Resistance Junction-case Max Thermal Resistance Junction-lead Max Thermal Resistance Junction-ambient Max S0-8 30 93 (*) Value PENTAWATT P2PAK 2.1 2.1 62.1 52.1 (**) PPAK 2.1 77.1 (**) Unit C/W C/W C/W
(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. (**) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick). Horizontal mounting and no artificial air flow.
ELECTRICAL CHARACTERISTICS (8VSymbol VCC VUSD VUSDhyst VOV RON Parameter Operating Supply Voltage Undervoltage Shut-down Undervoltage Shut-down Hysteresis Overvoltage Shut-down On State Resistance Test Conditions Min 5.5 3 Typ 13 4 0.5 36 IOUT=2A; Tj=25C; VCC>8V IOUT=2A; VCC>8V Off State; VCC=13V; VIN=VOUT=0V IS Supply Current Off State; VCC=13V; VIN=VOUT=0V; Tj=25C On State; VCC=13V; VIN=5V; IOUT=0A IL(off1) IL(off2) IL(off3) IL(off4) Off State Off State Off State Off State Output Current Output Current Output Current Output Current VIN=VOUT=0V VIN=0V; VOUT=3.5V VIN=VOUT=0V; Vcc=13V; Tj =125C VIN=VOUT=0V; Vcc=13V; Tj =25C 0 -75 (#) 10 10 2 (#) 60 120 25 20 3.5 50 0 5 3 Max 36 5.5 Unit V V V V m m A A mA A A A A
SWITCHING (VCC=13V)
Symbol td(on) td(off) dVOUT/dt(on) dVOUT/dt(off) Parameter Turn-on Delay Time Turn-off Delay Time Turn-on Voltage Slope Turn-off Voltage Slope Test Conditions RL=6.5 from VIN rising edge to VOUT=1.3V RL=6.5 from VIN falling edge to VOUT=11.7V RL=6.5 from VOUT=1.3V to VOUT=10.4V RL=6.5 from VOUT=11.7V to VOUT=1.3V Min Typ 40 30 (#) (#) Max Unit s s V/s V/s
INPUT PIN
Symbol VIL IIL VIH IIH Vhyst VICL Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Clamp Voltage Test Conditions VIN=1.25V VIN=3.25V IIN=1mA IIN=-1mA 0.5 6 Min 1 3.25 Typ (#) (#) (#) (#) (#) 6.8 -0.7 Max 1.25 Unit V A V A V V V
10 8
(#) See relative diagram
3/29
1
VN750 / VN750S / VN750PT / VN750-B5
ELECTRICAL CHARACTERISTICS (continued) STATUS PIN
Symbol VSTAT ILSTAT CSTAT VSCL Parameter Test Conditions Status Low Output Voltage ISTAT=1.6mA Status Leakage Current Normal Operation; VSTAT=5V Status Pin Input Normal Operation; VSTAT=5V Capacitance ISTAT=1mA Status Clamp Voltage ISTAT=-1mA Min Typ (#) (#) Max 0.5 10 100 6 6.8 -0.7 8 Unit V A pF V V
PROTECTIONS
Symbol TTSD TR Thyst tSDL Ilim Vdemag Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis Status delay in overload condition Current limitation Turn-off Output Clamp Voltage Test Conditions Min 150 135 7 Typ 175 15 20 6 9 15 15 VCC-41 VCC-48 VCC-55 Max 200 Unit C C C s A A V
Tj>Tjsh 9VOPENLOAD DETECTION
Symbol IOL tDOL(on) Parameter Openload ON State Detection Threshold Openload ON State Detection Delay Openload OFF State Voltage Detection Threshold Openload Detection Delay at Turn Off Test Conditions VIN=5V IOUT=0A Min 50 Typ (#) Max 200 200 Unit mA s
VOL tDOL(off)
VIN=0V
1.5
(#)
3.5
V s
1000
(#) See relative diagram
OPEN LOAD STATUS TIMING (with external pull-up) IOUT< IOL VOUT > VOL VIN VIN
OVERTEMP STATUS TIMING Tj > Tjsh
VSTAT
VSTAT
tDOL(off)
tDOL(on)
tSDL
tSDL
4/29
2
1
VN750 / VN750S / VN750PT / VN750-B5
Switching time Waveforms
VOUT 90% 80%
dVOUT/dt(on)
dVOUT/dt(off)
10%
t
VIN td(on) td(off)
t
TRUTH TABLE
CONDITIONS Normal Operation Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > VOL Output Current < IOL INPUT L H L H H L H L H L H L H L H OUTPUT L H L X X L L L L L L H H L H STATUS H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L
5/29
1
VN750 / VN750S / VN750PT / VN750-B5
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I C C C C C C I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C E C C C C C E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2
IV C C C C C E
CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
6/29
1
VN750 / VN750S / VN750PT / VN750-B5
Figure 1: Waveforms
NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VUSDhyst VUSD INPUT LOAD VOLTAGE STATUS undefined
VCC
OVERVOLTAGE VCCVOL VOL VCC>VOV
OPEN LOAD without external pull-up INPUT LOAD VOLTAGE STATUS
Tj INPUT LOAD CURRENT STATUS
TTSD TR
OVERTEMPERATURE
7/29
1 1
VN750 / VN750S / VN750PT / VN750-B5
APPLICATION SCHEMATIC
+5V
+5V
Rprot STATUS
VCC
Dld C Rprot INPUT OUTPUT
GND
VGND
RGND
DGND
GND PROTECTION REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / (IS(on)max). 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table.
C I/Os PROTECTION:
If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot ) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k.
8/29
1
1
VN750 / VN750S / VN750PT / VN750-B5
OPEN LOAD DETECTION IN OFF STATE
Off state open load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1) no false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT=(VPU/(RL+RPU))RLOpen Load detection in off state
V batt.
VPU
VCC RPU INPUT DRIVER + LOGIC OUT + R STATUS VOL RL IL(off2)
GROUND
9/29
1
VN750 / VN750S / VN750PT / VN750-B5
Off State Output Current
IL(off1) (uA)
3 2.5 2 1.5 4 1 3 0.5 0 -0.5 -1 -50 -25 0 25 50 75 100 125 150 175 2
High Level Input Current
Iih (uA)
7
6
Off state Vcc=36V Vin=Vout=0V
Vin=3.25V
5
1
0 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Input Clamp Voltage
Vicl (V)
8 7.8
Status Leakage Current
Ilstat (uA)
0.05
Iin=1mA
7.6 7.4 7.2 7 6.8 6.6 6.4 6.2 6 -50 -25 0 25 50 75 100 125 150 175 0 -50 -25 0 25 50 75 100 125 150 175 0.01 0.02 0.03 0.04
Vstat=5V
Tc (C)
Tc (C)
Status Low Output Voltage
Vstat (V)
0.6
Status Clamp Voltage
Vscl (V)
8 7.8
0.5
Istat=1mA
7.6
Istat=1.6mA
0.4 7.4 7.2 0.3 7 6.8 0.2 6.6 6.4 6.2 0 -50 -25 0 25 50 75 100 125 150 175 6 -50 -25 0 25 50 75 100 125 150 175
0.1
Tc (C)
Tc (C)
10/29
1
VN750 / VN750S / VN750PT / VN750-B5
On State Resistance Vs Tcase
Ron (mOhm)
140
On State Resistance Vs VCC
Ron (mOhm)
120 110
120
100
Iout=2A Vcc=8V; 13V; 36V
Iout=2A
100
Tc= 150C
90 80
80
Tc= 125C
70 60 50
60
40
Tc= 25C
40 20 30 0 -50 -25 0 25 50 75 100 125 150 175 20 5 10 15 20 25 30 35 40
Tc= - 40C
Tc (C)
Vcc (V)
Openload On State Detection Threshold
Iol (mA)
220 200 180 160 140 120
Input High Level
Vih (V)
3.6 3.4 3.2 3 2.8
Vcc=13V Vin=5V
100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 150 175 2.2 2 -50 -25 0 25 50 75 100 125 150 175 2.6 2.4
Tc (C)
Tc (C)
Input Low Level
Vil (V)
2.8 2.6 2.4 2.2 2
Input Hysteresis Voltage
Vhyst (V)
1.5 1.4 1.3 1.2 1.1 1
1.8 0.9 1.6 1.4 1.2 1 -50 -25 0 25 50 75 100 125 150 175 0.8 0.7 0.6 0.5 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
11/29
1
1
VN750 / VN750S / VN750PT / VN750-B5
Overvoltage Shutdown
Vov (V)
50 48 46 4 44 42 40 38 36 2 34 32 30 -50 -25 0 25 50 75 100 125 150 175 1.5 1 -50 -25 0 25 50 75 100 125 150 175 3.5 3 2.5
Openload Off State Voltage Detection Threshold
Vol (V)
5 4.5
Vin=0V
Tc (C)
Tc (C)
Turn-on Voltage Slope
dVout/dt/(on) (V/ms)
1000 900 800 700 600 500 400 300 200 100 0 -50 -25 0 25 50 75 100 125 150 175
Turn-off Voltage Slope
dVout/dt(off) (V/ms)
500 450
Vcc=13V Rl=6.5Ohm
400 350 300 250 200 150 100 50 0 -50 -25
Vcc=13V Rl=6.5Ohm
0
25
50
75
100
125
150
175
Tc (C)
Tc (C)
Ilim Vs Tcase
Ilim (A)
20 18
Vcc=13V
16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
12/29
1
1
VN750 / VN750S / VN750PT / VN750-B5
SO-8 Maximum turn off current versus load inductance
ILMAX (A) 100
10
A B C
1 0.1
A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C Conditions: VCC=13.5V Values are generated with RL=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization
1 L(mH)
10
100
t
13/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK, P2PAK Maximum turn off current versus load inductance
ILMAX (A) 100
10
A B C
1 0.1
A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C Conditions: VCC=13.5V Values are generated with RL=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization
1 L(mH)
10
100
t
14/29
VN750 / VN750S / VN750PT / VN750-B5
SO-8 THERMAL DATA
SO-8 PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.14cm2, 0.8cm2, 2cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (C/W)
SO-8 at 2 pins connected to TAB
110 105 100 95 90 85 80 75 70 0 0.5 1 1.5 2 2.5
PCB Cu heatsink area (cm^2)
15/29
VN750 / VN750S / VN750PT / VN750-B5
P2PAK THERMAL DATA
P2PAK PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.97cm2, 8cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (C/W)
55
Tj-Tamb=50C
50 45 40 35 30
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
16/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK THERMAL DATA
PPAK PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.44cm2, 8cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (C/W)
90 80 70 60 50 40 30 20 10 0 0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
17/29
VN750 / VN750S / VN750PT / VN750-B5
SO-8 Thermal Impedance Junction Ambient Single Pulse
ZTH (C/W) 1000
100
0.5 cm2 2 cm2
10
1
0.1
0.01 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000
Thermal fitting model of a single channel HSD in SO-8
Pulse calculation formula
Z TH = R TH + Z THtp ( 1 - )
where
= tp T
0.5 0.05 0.8 3.5 21 16 58 0.006 2.60E-03 0.0075 0.045 0.35 1.05 2
Thermal Parameter
Area/island (cm2) R1 (C/W) R2 (C/W) R3 ( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
28
T_amb
2
18/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK Thermal Impedance Junction Ambient Single Pulse
ZTH (C/W) 1000
100
0.44 cm 2 6 cm2
10
1
0.1 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000
Thermal fitting model of a single channel HSD in PPAK
Pulse calculation formula
Z TH = R TH + Z THtp ( 1 - )
where
= tp T
0.5 0.15 0.7 1.6 2 15 61 0.0006 0.0025 0.08 0.3 0.45 0.8 6
Thermal Parameter
Area/island (cm2) R1 (C/W) R2 (C/W) R3 ( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
24
T_amb
5
19/29
VN750 / VN750S / VN750PT / VN750-B5
P2PAK Thermal Impedance Junction Ambient Single Pulse
ZTH (C/W) 1000
100
0.5 cm2 6 cm2
10
1
0.1 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000
Thermal fitting model of a single channel HSD in P2PAK
Pulse calculation formula
Z TH = RTH + Z THtp ( 1 - )
where
= tp T
0.5 0.15 0.7 0.7 4 9 37 0.0006 0.0025 0.055 0.4 2 3 6
Thermal Parameter
Area/island (cm2) R1 (C/W) R2 (C/W) R3 ( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
22
T_amb
5
20/29
VN750 / VN750S / VN750PT / VN750-B5
SO-8 MECHANICAL DATA
mm. MIN. 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4 1.27 0.6 8 (max.) 0.8 1.2 0.031 0.047 0.14 0.015 TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5 6.2 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019
DIM. A a1 a2 a3 b b1 C c1 D E e e3 F L M S L1
21/29
VN750 / VN750S / VN750PT / VN750-B5
PENTAWATT (VERTICAL) MECHANICAL DATA
DIM. A C D D1 E F F1 G G1 H2 H3 L L1 L2 L3 L5 L6 L7 M M1 Diam. 3.65 2.6 15.1 6 4.5 4 3.85 0.144 10.05 17.85 15.75 21.4 22.5 3 15.8 6.6 0.102 0.594 0.236 0.177 0.157 0.152 2.4 1.2 0.35 0.8 1 3.2 6.6 3.4 6.8 mm. MIN. TYP MAX. 4.8 1.37 2.8 1.35 0.55 1.05 1.4 3.6 7 10.4 10.4 0.396 0.703 0.620 0.843 0.886 0.118 0.622 0.260 0.094 0.047 0.014 0.031 0.039 0.126 0.260 0.134 0.268 MIN. inch TYP. MAX. 0.189 0.054 0.110 0.053 0.022 0.041 0.055 0.142 0.276 0.409 0.409
22/29
VN750 / VN750S / VN750PT / VN750-B5
P2PAK MECHANICAL DATA
DIM. A A2 C D D1 E F G G1 H1 H2 L L1 L2 L3 M R V2 Package Weight 0 1.43 Gr (typ) 1.27 1.30 2.40 0.40 8 10.00 15 8 1.40 1.70 3.20 mm. MIN. 4.30 0.03 1.17 2.40 8.95 0.45 0.80 3.20 6.60 8.5 10.40 15.85 TYP MAX. 4.80 0.23 1.37 2.80 9.35 0.60 1.05 3.60 7.00
P010R
23/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK MECHANICAL DATA
DIM. A A1 A2 B B2 C C2 D1 D E E1 e G G1 H L2 L4 R V2 Package Weight 0 Gr. 0.3 0.60 0.2 8 4.90 2.38 9.35 0.8 6.00 6.40 4.7 1.27 5.25 2.70 10.10 1.00 1.00 MIN. 2.20 0.90 0.03 0.40 5.20 0.45 0.48 5.1 6.20 6.60 TYP MAX. 2.40 1.10 0.23 0.60 5.40 0.60 0.60
P032T1
24/29
VN750 / VN750S / VN750PT / VN750-B5
SO-8 TUBE SHIPMENT (no suffix)
B
C
A
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)
All dimensions are in mm.
100 2000 532 3.2 6 0.6
TAPE AND REEL SHIPMENT (suffix "13TR") REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2
End
All dimensions are in mm.
Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components
25/29
VN750 / VN750S / VN750PT / VN750-B5
PENTAWATT TUBE SHIPMENT (no suffix)
B
C
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)
All dimensions are in mm.
50 1000 532 18 33.1 1
A
26/29
VN750 / VN750S / VN750PT / VN750-B5
P PAK TUBE SHIPMENT (no suffix)
2
B
C
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)
All dimensions are in mm.
50 1000 532 18 33.1 1
A
TAPE AND REEL SHIPMENT (suffix "13TR") REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 60 30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 24 4 16 1.5 1.5 11.5 6.5 2
End
All dimensions are in mm.
Start Top cover tape No components 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min Components No components
27/29
VN750 / VN750S / VN750PT / VN750-B5
PPAK SUGGESTED PAD LAYOUT
A C
PPAK TUBE SHIPMENT (no suffix) Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)
All dimensions are in mm.
B
75 3000 532 6 21.3 0.6
3
1.8
6.7
TAPE AND REEL SHIPMENT (suffix "13TR") REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 16.4 60 22.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 16 4 8 1.5 1.5 7.5 2.75 2
End
All dimensions are in mm.
Start Top cover tape No components 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min Components No components
28/29
1
VN750 / VN750S / VN750PT / VN750-B5
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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